Event Details
FPGA Interconnection Networks with Capacitive Boosting
Presenter: Fatemeh Eslami
Supervisor: Dr. Mihai Sima
Date: Fri, July 20, 2012
Time: 09:30:00 - 00:00:00
Place: EOW 430
ABSTRACT
ABSTRACT:
The propagation delay of FPGA interconnection networks is a major challenge and continues to grow with newer technology nodes. Such interconnection networks are currently implemented using NMOS pass transistor based multiplexers followed by buffers. The threshold voltage drop across an NMOS device degrades the high logic value, and results in unbalanced rising and falling edges, static power consumption due to the crowbar currents, and reduced noise margins. Circuit design techniques to construct interconnection circuit with capacitive boosting will be described. By using capacitive boosting in FPGAs interconnection networks, the signal transitions are accelerated and the crowbar current of downstream buffers are reduced. In addition, buffers can be non-skewed or slightly skewed to improve noise immunity of the interconnection network. Simulation results indicate using capacitive boosting to implement the interconnection network can have a significant influence on propagation delay and tolerance to variations.