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Presenter: Jasbir Sarao
Supervisor:

Date: Tue, January 16, 2001
Time: 12:00:00 - 13:00:00
Place: EOW 430

ABSTRACT

Abstract:

The growth of analog IC design has been impeded by the process technologies which are mostly optimized for digital applications only. Moreover, the scaling trend in digital circuits is driving CMOS technology towards sub-micron gate lentgh CMOS transistors operating at a reduced power supply voltage. With the evolution of sub-micron technologies such as 0.25 micron and 0.18 micron, the supply voltages have been reduced to 3.3 Volts. This makes it difficult to design a voltage mode CMOS analog circuits with high linearity and wide dynamic range. Recently, the current mode circuits have become viable alternative for future applications because they can be operated at a smaller supply voltage due to their smaller volatge swings. Another advantage of current mode circuits is their inherent wide bandwidth capability. In this talk design of current mode A/D converter is discussed.

For further information contact jsarao@ece.uvic.ca.