Event Details

VLSI Design of Improved Logical Neighborhood Networks

Presenter: Anjum Shaikh
Supervisor:

Date: Thu, August 8, 2002
Time: 15:30:00 - 00:00:00
Place: EOW 430

ABSTRACT

Abstract:

In data communication, packet switching processes at the switching nodes are the pivotal performance factor. The huge provision of transmisson bandwidth by the optical fibre has shifted the onus for providing network's high quality of service towards the switch performance. From the system design point of view, the performance of switch or router greatly depends on its switching fabric. The function of switching fabric is to transport an incoming packet to its desired destination port, using time division or space division switching techniques. Any proposed switching fabric design must support high data transfer rates to meet the set performance requirements.

One promising high-speed switching fabric known in literature is the Improved Logical Neighborhood Network (ILN). Our group introduced analytical packet routing algorithms, and then varified this network's operation through numerical simulations. The results of this work proved that ILN is capable of providing high performance and outperforms many other known switching fabric architectures.

In this seminar the hardware implementation of the ILN is presented, along with a discussion on the backgrond of network switching. The VLSI implementation of ILN is accomplished in Xilinx Virtex-II FPGA. The model is realized in hardware by creating logic circuits for implementing the routing algorithm and the other necessary elements for transporting an arriving packet. The work presents a digital design specifications for ILN, and the application of hardware designing procedures. The ILN digital design follows hierarchical and modular design methologies. It is composed of layers of modules; wherin, each functional unit interacts proficiently with each other to perform the overall switching process of the ILN. The hardware implementation procedure shows the correctness of the ILN theory, and the feasibility for FPGA implementation with reports of hardware resource usage.

FREE AND OPEN TO THE PUBLIC.

For Further Information Please Contact: Anjum Shaikh at ashaikh@engr.uvic.ca